PENDSVSET=VALUE_0, PENDSTSET=VALUE_0, PENDSTCLR=VALUE_0, PENDSVCLR=VALUE_0, NMIPENDSET=VALUE_0
Interrupt Control and State Register
| VECTACTIVE | Active exception number |
| RETTOBASE | No preempted active exceptions to execute |
| VECTPENDING | Exception number of the highest priority pending enabled exception |
| ISRPENDING | Interrupt pending flag |
| ISRPREEMPT | Debug only |
| PENDSTCLR | SysTick clear-pending bit 0 (VALUE_0): No effect 1 (VALUE_1): Removes the pending state from the SysTick exception |
| PENDSTSET | SysTick set-pending bit 0 (VALUE_0): Write: no effect; read: SysTick exception is not pending 1 (VALUE_1): Write: changes SysTick exception state to pending; read: SysTick exception is pending |
| PENDSVCLR | PendSV clear-pending bit 0 (VALUE_0): No effect 1 (VALUE_1): Removes the pending state from the PendSV exception |
| PENDSVSET | PendSV set-pending bit 0 (VALUE_0): Write: no effect; read: PendSV exception is not pending 1 (VALUE_1): Write: changes PendSV exception state to pending; read: PendSV exception is pending |
| NMIPENDSET | NMI set-pending bit 0 (VALUE_0): Write: no effect; read: NMI exception is not pending 1 (VALUE_1): Write: changes NMI exception state to pending; read: NMI exception is pending |